Circuit Issues
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#0141MicrocontrollerDesignedv1.1

ESP32-S3 core controller, MINI-1 module

Same circuit as the 0140 WROOM-2 core with the smaller ESP32-S3-MINI-1 module (15.4 × 20.5 mm, 8 MB flash, no PSRAM). USB-C for native USB with ESD protection, BOOT and RESET buttons, a power LED and a PWM user LED, I²C pull-ups and series resistors on the UART. I²C, UART and 25 free GPIOs are brought out as hierarchical labels.

3D render of the 0141 ESP32-S3 core controller, MINI-1 module KiCad design block
3D render (KiCad 10)
3D render of the 0141 ESP32-S3 core controller, MINI-1 module KiCad design block
3D render, top view (KiCad 10)
Schematic of the 0141 ESP32-S3 core controller, MINI-1 module KiCad design block
Schematic (KiCad 10)

Key specifications

  • Supply 3.3 V on ESP_SUP+
  • USB-C device (native USB), 5 V VBUS out
  • I²C, UART (on IO39 / IO40) and 25 GPIOs on labels
  • 8 MB flash, no PSRAM

Design notes

  • There is no 3.3 V regulator in the block: ESP_SUP+ must come from e.g. 0090 (LDO) or 0101 (buck).
  • Status designed: the PCB layout is not finished yet (part placement around the module and one track still open).
Coming soon

This block is not available yet. It is released once its checks are complete. Planned price: €29.

One email when this template is released. No spam.

Planned package contents

  • KiCad 10 design block

    Schematic and PCB layout fragment; symbols and footprints embedded

  • BOM (CSV)

    Manufacturer part numbers and LCSC codes

  • Schematic PDF + README

    Interface, specs, population options and design notes

  • 3D models

    STEP models of the special parts; standard parts use KiCad’s 3D library

  • template.yaml

    Machine-readable interface and limits

PCB Composer

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About PCB Composer

Development status

Block ID0141
Block name0141-esp32s3-mini1-core
Version1.1
StatusDesigned – Schematic and layout fragment done; ERC/DRC clean-up and hardware verification pending.
Open review items2 (0 blocking)
PCB layoutLayout fragment without board outline; DRC clean-up pending
FormatKiCad 10 design block (schematic + PCB)
Last change2026-11-03

Interface

Hierarchical labels the block exposes to the rest of your design.

NetDirectionDescription
ESP_SUP+Power in3.3 V supply of the module
USB_VBUSPower out5 V VBUS from the USB-C connector, after a ferrite bead
I2C_SCLBidirectionalI²C clock, with pull-up
I2C_SDABidirectionalI²C data, with pull-up
UART_ESP_TXOutputUART TX (IO39), series resistor
UART_ESP_RXInputUART RX (IO40), series resistor
DIO_IO1BidirectionalGPIO IO1
DIO_IO2BidirectionalGPIO IO2
DIO_IO4BidirectionalGPIO IO4
DIO_IO5BidirectionalGPIO IO5
DIO_IO6BidirectionalGPIO IO6
DIO_IO7BidirectionalGPIO IO7
DIO_IO8BidirectionalGPIO IO8
DIO_IO9BidirectionalGPIO IO9
DIO_IO10BidirectionalGPIO IO10
DIO_IO11BidirectionalGPIO IO11
DIO_IO12BidirectionalGPIO IO12
DIO_IO13BidirectionalGPIO IO13
DIO_IO14BidirectionalGPIO IO14
DIO_IO15BidirectionalGPIO IO15
DIO_IO21BidirectionalGPIO IO21
DIO_IO26BidirectionalGPIO IO26
DIO_IO33BidirectionalGPIO IO33
DIO_IO34BidirectionalGPIO IO34
DIO_IO35BidirectionalGPIO IO35
DIO_IO36BidirectionalGPIO IO36
DIO_IO37BidirectionalGPIO IO37
DIO_IO38BidirectionalGPIO IO38
DIO_IO41BidirectionalGPIO IO41
DIO_IO42BidirectionalGPIO IO42
DIO_IO47BidirectionalGPIO IO47

FAQ

Which KiCad version do I need?

KiCad 10. The files are saved in the KiCad 10 format and are meant to be placed with KiCad’s Design Blocks feature (schematic block, then “Apply Design Block Layout” on the PCB).

Do I need the Circuit Issues part library?

No. Symbols are embedded in the schematic and footprints in the PCB, so the block opens on its own. Parts carry manufacturer part numbers and LCSC codes.

Is the layout production-ready?

Not yet. The PCB part is a layout fragment without a board outline and its DRC clean-up is still open. The status above shows where this block is.

Can I use the template in a commercial product?

The licence terms are published together with the first release.

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